FPGA Engineer
Hautcharage, Luxembourg
il y a 14h

Key responsibilities

Design complexes HDL systems, including SoC

Design and implement complex IP from scratch

Integrate existing IP and HDL code in new design

Define functional and performance goals with the software team

Develop designs and define micro-architecture plans for specifications review and test bench plans.

Optimize synthesis / place&route for timing optimization

Demonstrate best-practice design methodologies to achieve reliable and high-speed designs

Manage deliverables to meet the project requirements

Define HDL unit requirements from functional needs

Job requirements

VHDL and / or Verilog

Low level HDL implementation (clock domain, core FPGA primitives)

CPU, SoC architecture / design and industry standard interfaces.

FPGA tool flows : synthesis, partitioning, place & route : ISE, Vivado, etc.

FPGA partitioning and constraining of synthesis; Design optimizations with respect to FPGA limitations

Familiarity with the latest Xilinx FPGA technologies such as 7 series or Ultrascale+

Master degree in electronics engineering or equivalent

Over 5 years relevant experience required

Fluent in English, French is a plus as well as other languages

Preferred skills

In scripting / programming - ideally Unix, Tcl, C, C++ including low-level programming (firmware)

Embedded Linux

MATLAB / Simulink, and Hardware-in-the-Loop simulation

Hardware / system design, tools, debug, lab experience and vendor interface

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